Learning Chips Lab

Resource-efficient processor ASICs for applications in the field of artificial intelligence (AI) and, in particular, machine learning (ML) are becoming increasingly important in a wide variety of application scenarios, e.g. in the areas of condition monitoring, predictive maintenance, signal and sensor data analysis with large amounts of data, image and measurement data processing. Many of these applications require cost-effective, energy-efficient and compact embedded systems that can perform their tasks both with cloud/IoT support and autonomously. Edge computing, in which the actual signal analysis is carried out very close to the system to be monitored, is becoming increasingly important in this area.

The aim of the Learning Chip Lab is to develop technologies, methods and tools that can be used to develop resource-efficient processor chips, so-called Application Specific Integrated Circuits (ASICs), which are particularly suitable for the execution of ML and AI processes. The resource efficiency and high degree of integration of the processors enables their use in embedded systems, i.e. in technical applications with high requirements in terms of energy efficiency, costs, robustness or autonomy. To this end, methods and approaches from electrical engineering, information technology and computer science are combined. In particular, the lab will address the following topics through corresponding expertise and research work:

1. Efficient processor and ASIC technologies that perform ML/KI computations quickly and efficiently, as well as their implementation in microelectronic systems-on-chip (SoC) in modern, low-power digital semiconductor technologies.
   
   
2. Optimized ML/KI methods and accelerator architectures for their implementation in embedded processors and integration into cloud and edge computing systems. The focus here is on time series analyses, which are of great importance in industrial applications, e.g. in the field of smart buildings and smart energy systems.
   
   
3. Open source development tools for the model-based design of SW and HW solutions as well as integration into tool chains and development processes.

Corresponding ASICs with suitable development methodology and tooling are not yet sufficiently available and hardly accessible, especially for small and medium-sized enterprises (SMEs). The Learning Chips Lab therefore aims to make the technologies and tools freely available, e.g. by relying on open architectures (RISC V processor) and open source tools and making the results available to the public. The Learning Chips Lab is being set up on the basis of a pilot project for a specific chip development.

005-2105-0045

• Faculty of Information Technology (Prof. Dr. Wöhrle)
• Faculty of Electrical Engineering (Prof. Dr.-Ing. Karagounis)