About the person
Short vita
Prof. Karagounis studied communications engineering at the Cologne University of Applied Sciences. Parallel to his first professional activities in the IT and medical technology sector, the Cologne native completed a supplementary degree in electrical engineering at the University of Hagen. As part of his doctorate, he supported the development of a readout chip for the pixel detector at the ATLAS experiment, which is installed at the world's largest accelerator, the Large Hardron Collider in Geneva/Switzerland. After completing his doctorate, Prof. Karagounis worked for the Infineon subsidiary EPOS GmbH & Co KG in Duisburg as an analog/mixed-signal designer. There, the engineer developed integrated digital voltage regulators for the supply of microcontrollers with automotive applications. Prof. Karagounis then devoted himself to the development of phase-locked loop circuits, such as those used in smartphones with navigation functionality, as a radio frequency circuit designer at Intel Mobile Communications GmbH in Duisburg. In 2013, Prof. Karagounis was appointed to a basic professorship for electrical engineering at Hamm-Lippstadt University of Applied Sciences. Prof. Karagounis has been teaching electronics at Fachhochschule Dortmund since 2016.
Research
Running research projects
Finished research projects
Research & Development
Research & Development activities have a clear focus on the design of integrated analog/digital/mixed-signal and RF circuits in 180nm and 65nm CMOS technology.
Development work focuses, for example, on circuits for on-chip power management such as low drop-out (LDO) voltage regulators and DC/DC buck converters. Circuit blocks such as transimepdance amplifiers (TIA), time-to-digital converters (TDC) and delay-lock loops (DLL) are designed for optical applications. In the digital field, a number of protocol units such as I2C/CAN/Ethernet have been developed.
Microprocessor cores (MIPS, ARM, RISC-V) are also increasingly coming into focus for the implementation of complete system-on-chip (SoC) with local intelligence.
Of particular interest are circuit designs in radiation-hard design for use in high-energy physics experiments.
Here you can find information on current and completed research projects.
Ongoing research projects
Voltage regulator for serially supplied systems
Due to the very special conditions that prevail in the pixel detectors of the CERN experiments ATLAS and CMS, alternative supply schemes are currently being investigated to increase the supply efficiency. One approach is to connect the individual detector modules in series instead of in parallel and to supply them via a constant current source. This structure, which in principle is very similar to a string of lights, requires special measures to increase redundancy in order to prevent the entire chain from failing due to an interruption in the circuit. For this purpose, special voltage regulators are being designed in our laboratory (shunt LDO regulator), which allow the robust operation of several redundant regulators connected in parallel at module level. The project is supported by the German Federal Ministry of Education and Research, the University's internal research funding (HIFF) and the Graduate Center of Fachhochschule Dortmund.
Optical sensors for distance and angle measurement
The microelectronics industry in North Rhine-Westphalia has a strong focus on optical sensor technology, which is due to the fact that integrated optical sensors are playing an increasingly important role both in industrial automation and in automobiles in the application field of autonomous driving and passenger safety. In our laboratory, circuits and integrated sensors for distance measurements are designed according to the pulsed time-of-flight (TOF) principle. In addition, circuits for new types of optical angle sensors are being developed. This project is supported by the university's internal research funding (HIFF).
Designed microchips
PCR test chip
Name: PCR
Production date: August 2019
Technology: TSMC 65nm CMOS
Description: The PCR test chip comprises structures from two different projects. The upper part of the chip contains basic components of an optical angle sensor. The lower part consists of improved versions of a radiation-hard voltage regulator and a CAN physical layer with 5V dielectric strength as well as an SEU tolerant implementation of the self-designed Canakari CAN controller.
Detector Control System Controller V1
Name: Detector Control System Controller V1 (DCSControllerV1)
Production date: February 2019
Technology: TSMC 65nm CMOS
Description: This chip contains the first structures of the DCS controller chip, which is intended for controlling the ATLAS pixel detector. Integrated are radiation-hard regulators with 5V input voltage and 3.6V, 2.4V and 1.2V output voltage, a radiation-hard CAN physical layer and an SCB master for communication with the PSPP chip.
Shunt-LDO regular door Testchip C
Name: Shunt-LDO Regualtor Testchip C (SLDOTestchipC)
Production date: February 2019
Technology: TSMC 65nm CMOS
Description: Compared to test chip B, test chip C only contains an improved startup circuit for better turn-on behavior at low input currents.
Shunt-LDO regular door Testchip B
Name: Shunt-LDO Regualtor Testchip B (SLDOTestchipB)
Production date: November 2018
Technology: TSMC 65nm CMOS
Description: Compared to test chip A, test chip B also contains overvoltage protection and a high-impedance rectifier for coupling an AC control signal, which can be used to increase the offset voltage of the regulator in a low-power mode. A startup circuit has also been integrated for better switch-on behavior at low input currents.
Shunt-LDO regular door Testchip A
Name: Shunt-LDO Regualtor Testchip A (SLDOTestchipA)
Production date: August 2018
Technology: TSMC 65nm CMOS
Description: This test chip contains a significantly revised design of the shunt LDO regulator. The supply voltage sweep of the bandgap voltage reference circuits has been significantly improved. Protective circuits against overload have also been integrated.
Pixel Serial Power & Protection Chip v3
Name: Pixel Serial Power & Protection Chip v3 (PSSPv3)
Production date: November 2017
Technology: Globalfoundries 130nm CMOS
Description: This chip was designed in cooperation with the University of Wuppertal for the control system of the ATLAS pixel detector. In addition to the components of the PARC chip, it also contains a power-ON reset circuit designed by Rizwan Ahmad. In the picture, bump bonds can be recognized as small spheres.
Research and Development CERN Collaboration 53 Chip A
Name: Research and Development CERN Collaboration 53 Chip A (RD53A)
Production date: September 2017
Technology: TSMC 65nm CMOS
Description: This chip is the first prototype of the pixel ASIC that will be used in the upcoming High-Luminosity Upgrade of the LHC at CERN in both the ATLAS and the CMS pixel detector. Fachhochschule Dortmund contributed the 2A version of the shunt LDO controller to this chip, which was developed in collaboration with more than 20 universities and research institutes worldwide.
VULCAN 2
Name: VULCAN 2
Production date: August 2017
Technology: TSMC 65nm CMOS
Description: This ASIC was designed in cooperation with the Research Center Jülich and is a photomultiplier tube readout chip, which should be used in the Chinese neutrino detector JUNO. Compared to the VULCAN1 chip it contains some bugfixes and improvements in the analog as well as in the digital part.
PSPP Add-on Regulator and Comparator
Name: PSPP Add-on Regulator and Comparator (PARC)
Production date: February 2017
Technology: Globalfoundries 130nm CMOS
Description: This test chip was designed in cooperation with the University of Wuppertal and contains circuits for the "Pixel Serial Power & Protection" (PSPP) chip. This includes radiation-hard shunt and linear regulators designed by Prof. Karagounis and Rizwan Ahmad, a bandgap voltage reference developed by Tobias Fröse and other components such as a comparator, SEU test logic, physical layer I/O pads for single-ended AC-coupled communication.
Shunt-LDO regular door 2A
Name: Shunt-LDO regular door 2A (SLDO2A)
Production date: October 2016
Technology: TSMC 65nm CMOS
Description: With this test chip, a shunt-LDO regulator version was manufactured that can deliver an increased load current of 2A. In addition, the circuit was modified so that a defined offset voltage can be set at low input currents. A bandgap voltage reference circuit was also integrated, which serves as a reference for the regulator.
VULCAN 1
Name: VULCAN 1
Production date: August 2016
Technology: TSMC 65nm CMOS
Description: This ASIC was designed in cooperation with the Forschungszentrum Jülich in and is a photomultiplier tube readout chip, which should be used in the Chinese neutrino detector JUNO. The readout is based on transimpedance amplifiers and downstream 8-bit 1-GSample/s analog-to-digital converters. In addition to a 1 GHz PLL, voltage regulators and LVDS drivers, the chip contains a complex digital part for siganl processing and data compression, which was designed by Prof. Karagounis in collaboration with Dr. Pavithra Murahlidaran.
Shunt-LDO regular door 65
Name: Shunt-LDO regular door 65
Production date: February 2016
Technology: TSMC 65nm CMOS
Description: On this test chip, the shunt LDO regulator from the IBM 130nm CMOS technology was transferred to the TSMC 65nm CMOS for the first time. The chip contains a version of the regulator as used on the FE-I4 front-end chip, which was used in the IBL upgrade of the ATLAS pixel detector. Three regulators are integrated, which can deliver a maximum load current of 0.5A.
Juelich Multi-Purpose Amplitude Readout
Name: Juelich Multi-Purpose Amplitude Readout (JUMPAR)
Production date: June 2014
Technology: TSMC 65nm CMOS
Description: This ASIC was designed in cooperation with Forschungszentrum Jülich and includes system components such as a voltage regulator, amplifier, analog-to-digital converter and a time-to-digital converter. Prof. Karagounis has contributed an I2C slave including a configuration register.
Publications
- J. Kampkötter, M. Karagounis, and R. Kokozinski, “A high frequency radiation hardened DC/DC-converter with low volume air core inductor,” Journal of Instrumentation, vol. 19, pp. C01052–C01052, 2024.Open publication
- A. Walsemann, M. Karagounis, A. Stanitzki, and D. Tutsch, “Fault tolerance evaluation study of a RISC-V microprocessor for HEP applications,” Journal of Instrumentation, vol. 19, pp. C02012–C02012, 2024.Open publication
Publications
- J. Kampkötter, M. Karagounis and A. Grabmaier,
Step-Down Converter With Stacked Core Transistors for the Innermost Layers of High-Luminosity High-Energy Physics Experiments,
IEEE Transactions on Nuclear Science, vol. 71, no. 9, pp. 2056-2066, Sept. 2024 - F. Schneider, M. Karagounis and B. Choubey,
Energy and Bandwidth Efficient Sparse Programmable Dataflow Accelerator,
IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 71, no. 9, pp. 4092-4105, Sept. 2024 - A. Walsemann, M. Karagounis, A. Stanitzki, D. Tutsch,
Fault tolerance evaluation study of a RISC-V microprocessor for HEP applications,
Journal of Instrumentation, Vol 19, p C02012, 2024 - J. Kampkötter, M. Karagounis, R. Kokozinski,
A high frequency radiation hardened DC/DC-converter with low volume air core inductor,
Journal of Instrumentation, Vol. 19, C01052, 2024 - A. Walsemann, M. Karagounis, A. Stanitzki, D. Tutsch,
A radiation hard RISC-V microprocessor for high-energy physics applications,
Nuclear Instruments and Methods in Physics Research Section A, vol. 1056, p. 168633, 2023 - H. Wöhrle, F. Schneider, F. Schlenke, D. Lebold, M. De Lucas, F. Kirchner, M. Karagounis,
Multi-Objective Surrogate-Model-Based Neural Architecture and Physical Design Co-Optimization of Energy Efficient Neural Network Hardware Accelerators,
IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 70, no. 1, pp. 40-53, Jan. 2023 - A. Walsemann, M. Karagounis, A. Stanitzki, D. Tutsch,
STRV-a radiation hard RISC-V microprocessor for high-energy physics applications,
Journal of Instrumentation, 18 y., nr. 02, p. C02032, 2023 - R. Ahmad, A. Adam, J. Besproswanny, M. Karagounis, P. Kind, S. Kersten, A. Qamesh, A. Walsemann, C. Zeitnitz,
Second generation Monitoring of Pixel System (MOPS) chip for the Detector Control System (DCS) of the ATLAS ITk Pixel detector,
Journal of Instrumentation, 18 y, no. 04, p. C04015, 2023 - A. Qamesh, R. Ahmad, D. Ecker, T. Fischer, M. Karagounis, P. Kind, S. Kersten, T. Krawutschke, Tobias, L. Schreiter, C. Zeitnitz,
System Integration of ATLAS ITK Pixel DCS ASICs,
Journal of Instrumentation, Vol. 18, No. 05, P. C05003, 2023 - J. Kampkötter, M. Karagounis, R. Kokozinski,
Design and characterization of a cascode switching stage for high frequency radiation hardened DC/DC converters for the supply of future pixel detectors,
Journal of Instrumentation, 17 y., nr. 12, p. C12022, 2022 - J. Kampkötter, M. Karagounis, D. Koukola, F. Loddo, S. Orfanelli, A. Pradas Luengo, G. Traversi, R. Kokozinski,
Characterization and verification of the Shunt-LDO regulator and its protection circuits for serial powering of the ATLAS and CMS pixel
detectors, Journal of Physics: Conference Series, Vol. 2374, No. 012071, 2022 - R. Ahmad, A. Beer, T. Fröse, M. Karagounis, S. Kersten, P. Kind, P. Ledüc, A. Qamesh, J. Besproswanny, A. Walsemann, C. Zeitnitz,
The Monitoring of Pixel System (MOPS) chip for the Detector Control System of the ATLAS ITk Pixel Detector,
Journal of Physics: Conference Series, p. 012094, 2022 - H. Wöhrle, M. De Lucas Alvarez, F. Schlenke, A. Walsemann, M. Karagounis, F. Kirchner,
Surrogate Model based Co-Optimization of DeepNeural Network Hardware Accelerators,
International Midwest Symposium on Circuits and Systems, East Lansing, USA, 2021 - L. Alaee, M. Karagounis, T. Rotter, A. Pille, F. Schneider, R. Karaarslan, J. Sarangi,
Developmemt of a Time-of-Flight 3D and polarization Camera for automotive applications, Dortmund International Research Conference, Dortmund, Germany, 2021 - A. Dimitrevska, A. Stiller A., M. Karagounis, et. al,
RD53A: A large-scale prototype chip for the phase II upgrade in the serially powered HL-LHC pixel detectors, Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, Vol. 958, 2020 - H. Wöhrle, M. Karagounis,
Hardware Architectures for Machine Learning in Embedded and Distributed Systems, Smart Energy and Systems, Dortmund, Germany 2019 - J. Kampkötter, A. Stiller, M. Karagounis, et. al,
Stabilization and Protection of the Shunt-LDO regulator for the HL-LHC pixel detector upgrades,
Topical Workshop on Electronics for Particle Physics, Santiago de Compostela, Spain, 2019 - F. Hinterkeuser, M. Karagounis, et. al,
Recent Advances in Serial Powering of Silicon Pixel Detectors,
IEEE Nuclear Science Symposium and Medical Imaging Conference, Manchester, United Kingdom, 2019 - A. Walsemann, R. Ahmad, M. Karagounis, et. al,
A CANopen based prototype chip for the Detector Control System of the ATLAS ITk Pixel Detector,
Topical Workshop on Electronics for Particle Physics, Santiago de Compostela, Spain, 2019 - S. Marconi, Karagounis M., et. al,
Design implementation and test results of the RD53A, a 65 nm large scale chip for next generation pixel detectors at the HL-LHC,
IEEE Nuclear Science Symposium and Medical Imaging Conference Proceedings, 2018 - E. Monteil, M. Karagounis, et. al,
RD53A: a large scale prototype for HL-LHC silicon pixel detector phase 2 upgrades,
Topical Workshop on Electronics for Particle Physics, Antwerp, Belgium, 2018 - A. Pradas, D. Koukola, S. Orfanelli, J. Christiansen, M. Karagounis, F. Arteche,
System level serial powering studies of RD53A chip,
Topical Workshop on Electronics for Particle Physics, Antwerp, Belgium, 2018 - N. Lehmann, M. Karagounis, et al,
Control and Monitoring for a serially powered pixel demonstrator for the ATLAS Phase II upgrade,
TopicalWorkshop on Electronics for Particle Physics, Antwerp, Belgium, 2018 - A. Zambanini, P. Muralidharan, M. Karagounis, et. al,
Test strategy for low failure rates and status of a highly integrated readout chip for PMTs in JUNO,
TopicalWorkshop on Electronics for Particle Physics, Antwerp, Belgium, 2018 - S. Marconi, S. Orfanelli, M. Karagounis, T. Hemperek, J. Christiansen and P. Placidi,
Advanced power analysis methodology targeted to the optimization of a digital pixel readout chip design and its critical serial powering system,
Journal of Instrumentation, Volume 12, 2017 - P. Muralidharan, A. Zambanini, M Karagounis, C. Grewing, D. Liebau, D. Nielinger, M. Robens, A. Kruth, C. Peters, N. Parkalian,
An Automatic Baseline Regulation in a Highly Integrated Receiver Chip for JUNO,
Journal of Physics: Conference Series, Volume 888, conference 1, 2017 - S. Orfanelli, J. Christiansen, M. Hamer, F. Hinterkeuser, M. Karagounis, A. Pradas Luengo, S. Marconi, D. Ruini,
Serial Powering Optimization for CMS and ATLAS Pixel Detectors within RD53 Collaboration for HL-LHC: System Level Simulations and Testing,
Topical Workshop on Electronics for Particle Physics, Santa Cruz, USA, 2017 - N. Lehmann, R. Ahmad, P. Bergmann, T. Fröse, M. Karagounis, S. Kersten, P. Kind, Y. Narbutt, J. Schick, C. Zeitnitz,
Prototype Chip for a Control System in a Serial Powered Pixel Detector at the ATLAS Phase II Upgrade,
Topical Workshop on Electronics for Particle Physics, Santa Cruz, USA, 2017 - E. Conti, M. Karagounis, et. al.
Development of a Large Pixel Chip Demonstrator in RD53 for ATLAS and CMS Upgrades,
Topical Workshop on Electronics for Particle Physics, Santa Cruz, USA, 2017 - P. Muralidharan, V. Christ, C. Grewing, M. Karagounis, A. Kruth, D. Liebau, D. Nielinger, N. Parkalian, M. Robens, C. Roth, J. Steinmann, S. van Waasen, U. Yegin, A. Zambanini,
A Digital Processing Unit of a Highly Integrated Receiver Chip for PMTs in JUNO,
Topical Workshop on Electronics for Particle Physics, Santa Cruz, USA, 2017 - N. Lehmann, M. Karagounis, S. Kersten and C. Zeitnitz,
Development of a Detector Control System for the ATLAS Pixel detector in the HL-LHC,
Journal of Instrumentation, Volume 11, 2016 - N. Demaria, M. Karagounis, et. al,
Recent progress of RD53 Collaboration towards next generation Pixel Read-Out Chip for HL-LHC,
Journal of Instrumentation, Volume 11, 2016 - L. Gaioni, M. Karagounis, et. al,
Design of analog front-ends for the RD53 demonstrator chip,
The 25th International workshop on vertex detectors, Elba, Italy, 2016 - Pierpaolo Valerio, Michael Karagounis, et. al,
65 nm Technology for HEP: Status and Perspective,
The 23rd InternationalWorkshop on Vertex Detectors, Macha Lake, The Czech Republic, 2014 - Karagounis, M.; Becker, J.; Gottlicher, P.; Graafsma, H.; Hirsemann, H.; Jack, S.; Klyuev, A.;Lange, S.; Marras, A.; Nilsson, B.; Tian, F.; Trunk, U.Klanner, R.; Schwandt, J.; Zhang, J.; Dinapoli, R.; Greienberg, D.; Henrich, B.; Mozzanica, A.; Schmitt, B.; Shi, X.; Gronewald, M.; Krueger, H.,
AGIPD - The adaptive gain integrating pixel detector for the European XFEL development and status,
IEEE Nuclear Science Symposium Conference 2011 Record, Valencia, Spain, 2011 - Karagounis, M.; Pangaud, P.; Arutinov, D.; Barbero, M.; Breugnon, P.; Chantepie, B.; Clemens,
J.C.; Fei, R.; Fougeron, D.; Garcia-Sciveres, M.; Godiot, S.; Hemperek, T.; Kruger,H.; Mekkaoui, A.; Perrot, L.; Rozanov, A.; Wermes, N.,
A Tezzaron-Chartered 3D-IC electronic for SLHC/ATLAS hybrid pixels detectors test results and irradiations performance,
IEEE Nuclear Science Symposium Conference 2011 Record, Valencia, Spain,2011 - M. Karagounis, M. Garcia-Sciveres, D. Arutinov, M. Barbero, R. Beccherle, S. Dube, D. Elledge, J. Fleury, D. Fougeron, F. Gensolen, D. Gnani, V. Gromov, T. Hemperek R. Kluit, A. Kruth, A. Mekkaoui, M. Menouni, J.-D. Schipper,
The FE-I4 pixel readout integrated circuit,
Nuclear Instruments and Methods, Volume 636, Issue 1, Supplement, S155-S159,April 2011 - Michael Karagounis, Marlon Barbero, David Arutinov, Roberto Beccherle, Giovanni Darbo, Sourabh Dube, David Elledge, Julien Fleury, Denis Fougeron, Maurice Garcia-Sciveres, Fabrice Gensolen, Dario Gnani, Vladimir Gromov, Frank Jensen, Tomasz Hemperek, Ruud Kluit, Andre Kruth, Abderrezak Mekkaoui, Mohsine Menouni, Jan David Schipper,
Submission of the rst full scale prototype chip for upgraded ATLAS pixel detector at LHC FE-I4A,
Nuclear Instruments and Methods, Volume 650, Issue 1, 111-114, September 2011 - M. Karagounis, V. Zivkovic, J. -D. Schipper, R. Kluit, M. Garcia-Sciveres, A. Mekkaoui, M. Barbero, R. Beccherle, D. Gnani, T. Hemperek, M. Menouni, D. Fougeron, F. Gensolen, V. Gromov, A. Kruth, G. Darbo, J. Fleury, J. -C. Clemens, S. Dube, D. Elledge, A. Rozanov, D. Arutinov,
The design for test architecture in digital section of the ATLAS FE-I4 chip,
Journal of Instrumentation, 6 C01090, 2011 - M. Karagounis L. Gonella , D. Arutinov , M. Barbero , A. Eyring , F. Huegging , H. Krueger and N. Wermes,
A serial powering scheme for the ATLAS pixel detector at sLHC,
Journal of Instrumentation, 5 C12002, 2010 - M. Karagounis, Pangaud, D. Arutinov, M. Barbero, P. Breugnon, B. Chantepie, J.C. Clemens, R. Fei, D. Fougeron, M. Garcia-Sciveres, S. Godiot, T. Hemperek, , H. Kruger, A. Mekkaoui, L. Perrot, S. Rozanov, N. Wermes,
Test results and irradiation performances of 3-D circuits developed in the framework of ATLAS hybrid pixel upgrade,
Nuclear Science Symposium Conference Record 2010, Knoxville, USA, 2010 - M. Karagounis, D. Arutinov, M. Barbero, F. Huegging, H. Krueger, N. Wermes,
An Integrated Shunt-LDO regulator for serial powered systems,
Proceedings of the IEEE European Solid-State Circuits Conference, ?Athens, Greece, p. 276 -279, 2009 - M. Karagounis, G. Ahluwalia, M. Gronewald, M. Koch, H. Krueger, N.Wermes,
Development of a counting strip detector readout chip for precision compton polarimetry,
IEEE Nuclear Science Symposium Conference 2009 Record, Orlando, USA, 2009 - S. Godiot, M. Barbero, B. Chantepie, J.C. Clemens, R. Fei, J. Fleury, D. Fougeron, M.Garcia-Sciveres, T. Hemperek, M. Karagounis, H. Krueger, A. Mekkaoui,?P. Pangaud, A. Rozanov, N. Wermes,
3D electronics for hybrid pixel detectors,
Topical Workshop on Electronics for Particle Physics 2009, Paris, France, 2009 - D. Arutinov, M. Barbero, R. Beccherle, V. Buscher, G. Darbo, R. Ely, D. Fougeron, M. Garcia-Sciveres, D. Gnani, T. Hemperek, M. Karagounis, R. Kluit, V. Kostyukhin, A. Mekkaoui, M. Menouni, J. D. Schipper, N. Wermes,
Digital Architecture and Interface of the New ATLAS Pixel Front-End IC for Upgraded LHC Luminosity,
IEEE Transactions on Nuclear Science, Vol. 56 No. 2, 388-393, 2009 - M. Barbero, D. Arutinov, R. Beccherle, G. Darbo, R. Ely, D. Fougeron, M. Garcia-Sciveres, D. Gnani, T. Hemperek, M. Karagounis, R. Kluit, V. Kostioukhine, A. Mekkaoui, M. Menouni, J. D. Schipper,
A new ATLAS pixel front-end IC for upgraded LHC luminosity, Nuclear Instruments and Methods,
A604, 397-399, 2009 - T. Hemperek, D. Arutinov, M. Barbero, R. Beccherle, G. Darbo, S. Dube, D. Elledge, D. Fougeron, M. Garcia-Sciveres, D. Gnani, V. Gromov, M. Karagounis, R. Kluit, V. Kostyukhin, A. Kruth, A. Mekkaoui, M. Menouni, J. D. Schipper, N. Wermes,
Digital Architecture of the New ATLAS Pixel Chip FE-I4,
Proceedings of the Nuclear Science Symposium 2009, Orlando, USA, 2009 - A. K. Kruth, G. Ahluwalia, D. Arutinov, M. Barbero, R. Beccherle, S. Dube, G. Darbo, D. Elledge, R. Ely, D. Fougeron, M. Garcia-Sciveres, D. Gnani, V. Gromov, M. Gronewald, T. Hemperek, M. Karagounis, R. Kluit, V. Kostioukhine, A. Mekkaoui, M. Menouni, J. D. Schipper,
Charge Pump Clock Generation PLL for the Data Output Blocks of the Upgraded ATLAS Front-End in 130nm CMOS,
Proceedings of the TopicalWorkshop on Electronics for Particle Physics 2009, Paris, France, 2009 - Gottlicher, P., Graafsma, H., Hirsemann, H., Jack, S., Nilsson, B., Potdevin, G., Sheviakov, I., Tian, F., Trunk, U., Youngman, C., Zimmer, M., Becker, J., Fretwurst, E., Klanner, R., Perrey, H., Pintilie, I., Srivastava, A.K., Dinapoli, R., Henrich, B., Mozzanica, A., Schmitt, B., Shi, X., Karagounis, M., Kruger, H.,
The adaptive gain integrating pixel detector (AGIPD): A detector for the European XFEL. development and status,
IEEE Nuclear Science Symposium Conference 2009 Record, Orlando, USA, 2009 - M. Karagounis, D. Arutinov, M. Barbero, R. Beccherle, G. Darbo, R. Ely, D.Fougeron, M. Garcia-Sciveres, D. Gnani, V. Gromov, T. Hemperek, H. Junker, M. Menouni, A. Mekkaoui, R. Kluit, J.D. Schipper,
Development of the ATLAS FE-I4 pixel readout IC for blayer Upgrade and Super-LHC,
Topical Workshop on Electronics for Particle Physics 2008, Naxos, Greece, 2008 - M. Menouni, D. Arutinov, M. Barbero, R. Beccherle, R. Ely, D. Fougeron, M. Garcia-Sciveres, D. Gnani, T. Hemperek, M. Karagounis, R. Kluit, A. Mekkaoui, A. Rozanov, J.D. Schipper,
Design and Measurement of SEU tolerant latches, Proceedings of the Topical Workshop on Electronics for Particle Physics 2008,
Naxos, Greece, pp 402-405, 2008 - Kraft, E., Fischer, P., Karagounis, M., Koch, M., Krueger, H., Peric, I., Wermes, N., Herrmann, C., Nascetti, A., Overdick, M., Ruetten, W.,
Counting and Integrating Readout for Direct Conversion X-ray Imaging: Concept, Realization and First Prototype Measurements,
IEEE Transactions on Nuclear Science, Volume: 54 , Issue: 2, 383 - 390, 2007 - Andricek, L., Fischer, P., Giesen, F., Heinzinger, K., Herrmann, S., Herz, D., Karagounis, M., Kohrs, R., Kruger, H., Lechner, P., Lutz, G., Moser, H.-G., Peric, I., Reuen, L., Richter, R.H., Sandow, C., Schnecke, M., Schopper, F., Struder, L., v Torne, E., Treis, J., Trimpl, M., Velthuis, J., Wermes, N., Wolfel, S.,
The MOS-type DEPFET pixel sensor for the ILC environment,
Nuclear Science Symposium Conference Record, 2005 - Kohrs, R., Andricek, L., Fischer, P., Harter, M., Karagounis, M., Kruger, H., Lutz, G., Moser, H.G., Peric, I., Porro, M., Reuen, L., Richter, R.H., Sandow, C., Struder, L., Trimpl, M., Wermes, N.,
Development of a Prototype Module for a DEPFET Pixel Vertex Detector for a Linear Collider,
IEEE Transactions on Nuclear Science, Volume: 52 , Issue: 4, 2005
Teaching
Final theses
Embedded multi-core implementation of an XCP-on-Ethernet protocol in the basic software of a rapid control prototyping control unit
Master thesis, Ahmet Beyazoglu, September 2024
Analysis of the influence of temperature and supply voltage on the behavior of a ring oscillator-based physically unclonable function implemented in an FPGA and development of a GUI-based measurement sequence control in Qt(Opens in a new tab)
Bachelor thesis, Donale Junior Njoufack, June 2024
Characterization of the influence of temperature and supply voltage on the behavior of an SRAM based Physically Unclonable Function in the GateMate FPGA(Opens in a new tab)
Bachelor-Thesis, Aya Riahi, June 2024
Development of a synchronous current-controlled DC/DC buck converter for a conversion from 3.3 V to 1.2 V at a load current of 0.6 A(Opens in a new tab)
Bachelor thesis, Amine Thabti, May 2024
Setup of test environments based on a Xilinx Zynq SoC for measuring the leakage current and for radiation qualification of SRAM based FPGAs(Opens in a new tab)
Master-Thesis, Lars Koers, April 2024
Phase current measurement in drive technology using sigma-delta analog-to-digital conversion(Opens in a new tab)
Bachelor thesis, Julian Noss, March 2024
Design and integration of a carrier board to implement a test system for irradiation studies
Bachelor-Thesis, Hajar Naciri, February 2024
Design and Implementation of a Mixed-Signal Processing Chain for the Optical Determination of Rotation Angles(Opens in a new tab)
Master-Thesis, Ladan Alaee, January 2024
Realization of a UART to CAN communication bridge using an STM32 ARM microcontroller(Opens in a new tab)
Bachelor-Thesis, Fouzya Samdouni, October 2023
Readout and control of an oscilloscope with SCPI commands over Ethernet using the LXI library(Opens in a new tab)
Bachelor thesis, Matekeu Fokwa Oriane, October 2023
Design and FPGA implementation of a highly resource-efficient AES-256 encryption and decryption engine(Opens in a new tab)
Master-Thesis, Saul García Rodríguez, October 2023
Digital Calibration, Closed Loop Regulation and Implementation of Digital Debugging Features for the Delay Asymmetry Compensation Logic of a 3D Polarization Camera Based on Time-of-Flight Principle(Opens in a new tab)
Master-Thesis, Jitikantha Sarangi, August 2023
Hardening of an AI Hardware Accelerator against Radiation Induced Bit Errors(Opens in a new tab)
Bachelor thesis, Yunus Tas, August 2023
Design of a plug-on module for an STM32 Nucleo microcontroller board with a 3.3V and 1.2V CAN transceiver(Opens in a new tab)
Bachelor thesis, Ihssen Boukhriss, July 2023
Programming an STM32 microcontroller as a controllable voltage measuring device with SCPI interface(Opens in a new tab)
Bachelor thesis, Mohamed Mansour Smaalia, June 2023
Development of a software system to automate assertion generation for the verification of a memory build-in self-test using a description language for memory test algorithms(Opens in a new tab)
Bachelor thesis, Raphael Biermann, May 2023
Concepts for increasing the resilience to radiation-induced logic errors of the MOPS-HUB FPGA design in the control system of the ATLASpixeldetector(Opens in a new tab)
Bachelor thesis, Lucas Schreiter, May 2023
Design of a test system to characterize the components of the Monitoring of Pixel System chip in the ATLAS pixel detector at the LHC(Opens in a new tab)
Bachelor thesis, Nurullah Yaman, May 2023
Stabilization of a low-drop-out voltage regulator using a source-follower based voltage buffer
Bachelor-Thesis, Nader Ben Slimane, April 2023
Design of serial interfaces for configuration and testing of integrated circuits
Master-Thesis, Achraf Drissi El Bouzaidi, April 2023
Radiation Qualification of the Cologne Chip GateMate A1 FPGA
Master-Thesis, Richard Jung, April 2023
Design of an integrated 3-level buck converter in a 180nm CMOS technology
Master-Thesis, Stanislav Christiani, February 2023
Design of printed circuit boards for the supply and readout of an optical angle encoder
Bachelor thesis, Oguz Eroglu, February 2023
Characterization of integrated diodes with linear polarization filters and a transimpedance amplifier in a 65nm CMOS technology for use in optical angle measurement
Bachelor-Thesis, Ferhan Kobyaoglu, February 2023
Development of a mixed-signal front-end for the validation of integrated semiconductors in the automotive temperature range
Master thesis, Edis Salkovic, January 2023
Design of a DCM circuit for improving the efficiency of a synchronous buck converter at low load currents
Bachelor thesis, Mohammed Nacer, December 2022
FPGA Implementation of a Ring Oscillator Based Physically Unclonable Function
Bachelor Thesis, Mehdi Mneja, December 2022
Programming an ESP32 microcontroller to monitor a battery voltage via LoRaWAN wireless technology
Bachelor-Thesis, Ümmühan Carpisan, December 2022
Controlling a Keithley 2400 sourcemeter via an RS-232 interface using SCPI commands
Bachelor-Thesis, Abdallah Battai, August 2022
FPGA Implementation of an SRAM based Physically Unclonable Function
Bachelor-Thesis, Idriss Karmadi, August 2022
Configuration of an STM32 microcontroller as an adjustable reference voltage source with SCPI interface
Bachelor thesis, Omar Ben Hamouda, August 2022
Design of a buck converter with pulse width modulated control by a hysteresis comparator
Bachelor-Thesis, Amine Gasmi, July 2022
Automation of a Fermentation System in a Brewery
Master thesis, Ali Shan, July 2022
Power Simulation of a MIPS microAptiv UP Core implemented as a virtual ASIC prototype in a 65nm CMOS technology
Master-Thesis, Yanchen Shi, April 2022
Temperature-stable bandgap voltage reference with stabilized differential amplifier with a reference voltage of 1.2 V for use in a synchronous buck converter
Bachelor thesis, Alperen Yigit, April 2022
Development of a measurement concept for the detection of ionizing photon radiation by an electronic personal dosimeter
Master thesis, Nurullah Özkan, February 2022
Configuration of a GNU RISC-V toolchain for programming a Sipeed Longan Nano microcontroller board in the Eclipse IDE
Bachelor thesis, Mehmet Kiyak, December 2021
Development of a gateway for controlling pumps in the industrial sector via different interface standards using auto-recognition
Master thesis, Michael Vössing, November 2021
Implementation of a Bayesian algorithm for the optimization of synthesis results
Master thesis, Aaron Beer, October 2021
Automated metrological characterization of a time-to-digital converter for a time-of-flight application
Remzi Karaarslan, Bachelor Thesis, October 2021
Validation of the SLDO voltage regulator for the pixel detectors of the ATLAS and CMS experiments at the HL-LHC and extension of the Shuldo test system with programmable potentiometers
Master thesis, Maurice Bankowsky, August 2021
UART-based control of an STM32 microcontroller via a Qt user interface
Bachelor thesis, Ömer Yildirim, July 2021
Development of an embedded system for radio-based transmission of chain hoist data with OPC UA
Master thesis, Sven Müller, July 2021
Digitally controlled frequency correction of a radiation-hard relaxation oscillator for a CAN bittiming unit in 65nm CMOS technology
Master-Thesis, Reda Bouroumiya, July 2021
Extension of field-programmable devices by a PCI Express interface as a key technology for networking digital systems and artificial intelligence
Master-Thesis, Philipp Ledüc, July 2021
Optimization of a Local Passive Interpolation Time-to-Digital Converter with Sub-Gate Delay for a Time-of-Flight Application
Master-Thesis, Andreas Pille, April 2021
Alternative concept to the brushed DC motor for car locks
Bachelor thesis, Yunus Calagil, January 2021
VHDL implementation of the arc sine function and the division of fixed-point numbers according to the CORDIC algorithm
Bachelor thesis, Sofiene Tijani, November 2020
Integration of a hardware accelerator for machine learning in a RISC-V RV32IM processor via memory-mapped registers
Master thesis, Fabian Brünger, August 2020
Design of integrated diodes with polarization filters and a transimpedance amplifier for use in an optical angle encoder in 65nm CMOS technology
Master thesis, Markus Diekmann, August 2020
Design and validation of a discrete infrared LED driver for the characterization of ToF cameras
Bachelor thesis, Florian Wenske, August 2020
Design of a radiation-hard 5V voltage regulator from cascoded thin-gate transistors in a 65nm CMOS technology
Master thesis, Semih Yilmaz, December 2019
Design of an I2C to CAN bridge logic in VHDL and development of a software environment for performing system tests
Bachelor thesis, Armin Kuka, December 2019
Development of an automated sampling device for the evaluation of quarter-individual milk sensors
Master's thesis, Tim Hölzemann, November 2019
Development of a VHDL design and application software for the configuration and calibration of an optical angle sensor
Bachelor thesis, Conrad Demske, November 2019
Radiation-hard CAN physical layer in 65 nm CMOS technology for the control system of the ATLAS pixel detector
Master thesis, Tobias Froese, October 2019
Development of a galvanically isolated electronic interface for the transmission of analog and digital signals under consideration of technical and commercial aspects
Master's thesis, Gerrit Tolksdorf, September 2019
Metrological validation of a shunt low-dropout voltage regulator for the current-based supply of the serially connected pixel detector modules of the ATLAS and CMS experiment at the High-Luminosity Large Hadron Collider
Master thesis, Jendrik Zorn, August 2019
Verification of the Shunt-Low-Dropout voltage regulator for the current based supply of the serially connected pixel detector modules of the ATLAS- and CMS-experiments at the High-Luminosity Large Hadron Collider
Master thesis, Florian Winkler, August 2019
Development of a transimpedance amplifier circuit for the detection of the switch-on time of the laser diode of a time-of-flight camera
Bachelor thesis, Koray Cetin, August 2019
USB-based integration of multimeters into a measuring station for the automated characterization of voltage regulators
Bachelor thesis, Ömer Faruk Icyer, August 2019
Design of the magnetic components of a bidirectional 3kW DC/DC converter for automotive applications
Master thesis, Jeremias Kampkötter, May 2019
Development of a test system for the physical and data link layer of the PSI5 bus with automated evaluation based on Xilinx ZYNQ SoCs
Master's thesis, Alexander Walsemann, April 2019
Design and layout of a driver stage for use in a synchronous buck converter
Bachelor thesis, Yassine Choukri, March 2019
Characterization and analysis of reverse and forward body biasing as a throughput and power optimization technique for multi-core microcontrollers
Master thesis, Jan-Morten Reiners, March 2019
Configuration and commissioning of the FTDI 2232H Mini module as an I2C interface
Bachelor thesis, Nurullah Özkan, March 2019
Extension of a clocktree analysis tool to determine the structural equivalence of clocktrees
Master thesis, Johannes Düperthal, February 2019
Development of an electronic load for testing power supplies in product development
Master's thesis, Raphael Achtelik, January 2019
Development of a control of a DA converter connected to an FPGA using a QT application
Bachelor thesis, Othmane Guellaf, December 2018
Development of a delay-locked loop based time-to-digital converter with sub-gate delay resolution for a time-of-flight application in 350 nm CMOS technology
Master thesis, Matthias Krause, June 2018
Design of a delay-locked loop for use as a time-to-digital converter in a time-of-flight application in 350nm CMOS technology
Master thesis, Markus Lippold, June 2018
Development of a low-side comparator for a sawtooth generator for use in a buck converter in 180nm CMOS technology
Bachelor thesis, Oussama Mokrane, March 2018
Analog and Digital CMOS Circuit Design for the Control System of ATLAS Pixel Detector
Master thesis, Ahmad Rizwan, March 2018
Design of a Low-Drop Out Regulator in 180nm CMOS Technology for Use in a Synchronous DC-DC Voltage Converter
Bachelor thesis, Sahin Deniz, March 2018
VHDL design of an RMII interface for connecting physical layer devices to an Ethernet MAC protocol unit
Bachelor thesis, Aaron Beer, March 2018
VHDL design of a frame generator for the implementation of the Ethernet MAC protocol layer
Bachelor thesis, Björn Fiegler, November 2017
Development of a sawtooth generator for a synchronous buck converter in a 180nm CMOS technology
Bachelor thesis, Reda Bouroumiya, November 2017
Feasibility study of a solar power plant with tracking system in Jordan
Bachelor thesis, Cagdas Karamahmut, November 2017
Realization of a measurement setup for the calculation of a complex impedance on a 12 volt lead-acid battery
Bachelor thesis, Murat Lacin, October 2017
Development of an automated charging, discharging and test system for a series circuit of high-performance cells
Master's thesis, Max Espelkott, September 2017
Bachelor thesis, Lucas Schreiter, May 2023
Design of a test system to characterize the components of the Monitoring of Pixel System chip in the ATLAS pixel detector at the LHC(Opens in a new tab)
Bachelor thesis, Nurullah Yaman, May 2023
Stabilization of a low-drop-out voltage regulator using a source-follower based voltage buffer(Opens in a new tab)
Bachelor-Thesis, Nader Ben Slimane, April 2023
Design of serial interfaces for configuration and testing of integrated circuits(Opens in a new tab)
Master-Thesis, Achraf Drissi El Bouzaidi, April 2023
Radiation Qualification of the Cologne Chip GateMate A1 FPGA(Opens in a new tab)
Master-Thesis, Richard Jung, April 2023
Design of an integrated 3-level buck converter in a 180nm CMOS technology(Opens in a new tab)
Master-Thesis, Stanislav Christiani, February 2023
Design of printed circuit boards for the supply and readout of an optical angle encoder(Opens in a new tab)
Bachelor thesis, Oguz Eroglu, February 2023
Characterization of integrated diodes with linear polarization filters and a transimpedance amplifier in a 65nm CMOS technology for use in optical angle measurement(Opens in a new tab)
Bachelor-Thesis, Ferhan Kobyaoglu, February 2023
Development of a mixed-signal front-end for the validation of integrated semiconductors in the automotive temperature range(Opens in a new tab)
Master thesis, Edis Salkovic, January 2023
Design of a DCM circuit for improving the efficiency of a synchronous buck converter at low load currents(Opens in a new tab)
Bachelor thesis, Mohammed Nacer, December 2022
FPGA Implementation of a Ring Oscillator Based Physically Unclonable Function(Opens in a new tab)
Bachelor Thesis, Mehdi Mneja, December 2022
Programming an ESP32 microcontroller to monitor a battery voltage via LoRaWAN wireless technology(Opens in a new tab)
Bachelor-Thesis, Ümmühan Carpisan, December 2022
Controlling a Keithley 2400 sourcemeter via an RS-232 interface using SCPI commands(Opens in a new tab)
Bachelor-Thesis, Abdallah Battai, August 2022
FPGA Implementation of an SRAM based Physically Unclonable Function(Opens in a new tab)
Bachelor-Thesis, Idriss Karmadi, August 2022
Configuration of an STM32 microcontroller as an adjustable reference voltage source with SCPI interface(Opens in a new tab)
Bachelor thesis, Omar Ben Hamouda, August 2022
Design of a buck converter with pulse width modulated control by a hysteresis comparator(Opens in a new tab)
Bachelor-Thesis, Amine Gasmi, July 2022
Automation of a Fermentation System in a Brewery
Master thesis, Ali Shan, July 2022
Power Simulation of a MIPS microAptiv UP Core implemented as a virtual ASIC prototype in a 65nm CMOS technology(Opens in a new tab)
Master-Thesis, Yanchen Shi, April 2022
Temperature-stable bandgap voltage reference with stabilized differential amplifier with a reference voltage of 1.2 V for use in a synchronous buck converter(Opens in a new tab)
Bachelor thesis, Alperen Yigit, April 2022
Development of a measurement concept for the detection of ionizing photon radiation by an electronic personal dosimeter(Opens in a new tab)
Master thesis, Nurullah Özkan, February 2022
Configuration of a GNU RISC-V toolchain for programming a Sipeed Longan Nano microcontroller board in the Eclipse IDE(Opens in a new tab)
Bachelor thesis, Mehmet Kiyak, December 2021
Development of a gateway for controlling pumps in the industrial sector via different interface standards using auto-recognition
Master thesis, Michael Vössing, November 2021
Implementation of a Bayesian algorithm for the optimization of synthesis results(Opens in a new tab)
Master thesis, Aaron Beer, October 2021
Automated metrological characterization of a time-to-digital converter for a time-of-flight application(Opens in a new tab)
Remzi Karaarslan, Bachelor Thesis, October 2021
Validation of the SLDO voltage regulator for the pixel detectors of the ATLAS and CMS experiments at the HL-LHC and extension of the Shuldo test system with programmable potentiometers(Opens in a new tab)
Master thesis, Maurice Bankowsky, August 2021
UART-based control of an STM32 microcontroller via a Qt user interface
Bachelor thesis, Ömer Yildirim, July 2021
Development of an embedded system for radio-based transmission of chain hoist data with OPC UA
Master thesis, Sven Müller, July 2021
Digitally controlled frequency correction of a radiation-hard relaxation oscillator for a CAN bittiming unit in 65nm CMOS technology(Opens in a new tab)
Master-Thesis, Reda Bouroumiya, July 2021
Extension of field-programmable devices by a PCI Express interface as a key technology for networking digital systems and artificial intelligence(Opens in a new tab)
Master-Thesis, Philipp Ledüc, July 2021
Optimization of a Local Passive Interpolation Time-to-Digital Converter with Sub-Gate Delay for a Time-of-Flight Application(Opens in a new tab)
Master-Thesis, Andreas Pille, April 2021
Alternative concept to the brushed DC motor for car locks
Bachelor thesis, Yunus Calagil, January 2021
VHDL implementation of the arc sine function and the division of fixed-point numbers according to the CORDIC algorithm(Opens in a new tab)
Bachelor thesis, Sofiene Tijani, November 2020
Integration of a hardware accelerator for machine learning in a RISC-V RV32IM processor via memory-mapped registers(Opens in a new tab)
Master thesis, Fabian Brünger, August 2020
Design of integrated diodes with polarization filters and a transimpedance amplifier for use in an optical angle encoder in 65nm CMOS technology
Master thesis, Markus Diekmann, August 2020
Design and validation of a discrete infrared LED driver for the characterization of ToF cameras(Opens in a new tab)
Bachelor thesis, Florian Wenske, August 2020
Design of a radiation-hard 5V voltage regulator from cascoded thin-gate transistors in a 65nm CMOS technology(Opens in a new tab)
Master thesis, Semih Yilmaz, December 2019
Design of an I2C to CAN bridge logic in VHDL and development of a software environment for performing system tests(Opens in a new tab)
Bachelor thesis, Armin Kuka, December 2019
Development of an automated sampling device for the evaluation of quarter-individual milk sensors
Master's thesis, Tim Hölzemann, November 2019
Development of a VHDL design and application software for the configuration and calibration of an optical angle sensor(Opens in a new tab)
Bachelor thesis, Conrad Demske, November 2019
Radiation-hard CAN physical layer in 65 nm CMOS technology for the control system of the ATLAS pixel detector(Opens in a new tab)
Master thesis, Tobias Froese, October 2019
Development of a galvanically isolated electronic interface for the transmission of analog and digital signals under consideration of technical and commercial aspects
Master's thesis, Gerrit Tolksdorf, September 2019
Metrological validation of a shunt low-dropout voltage regulator for the current-based supply of the serially connected pixel detector modules of the ATLAS and CMS experiment at the High-Luminosity Large Hadron Collider(Opens in a new tab)
Master thesis, Jendrik Zorn, August 2019
Verification of the Shunt-Low-Dropout voltage regulator for the current based supply of the serially connected pixel detector modules of the ATLAS- and CMS-experiments at the High-Luminosity Large Hadron Collider(Opens in a new tab)
Master thesis, Florian Winkler, August 2019
Development of a transimpedance amplifier circuit for the detection of the switch-on time of the laser diode of a time-of-flight camera (Opens in a new tab)
Bachelor thesis, Koray Cetin, August 2019
USB-based integration of multimeters into a measuring station for the automated characterization of voltage regulators
Bachelor thesis, Ömer Faruk Icyer, August 2019
Design of the magnetic components of a bidirectional 3kW DC/DC converter for automotive applications
Master thesis, Jeremias Kampkötter, May 2019
Development of a test system for the physical and data link layer of the PSI5 bus with automated evaluation based on Xilinx ZYNQ SoCs(Opens in a new tab)
Master's thesis, Alexander Walsemann, April 2019
Design and layout of a driver stage for use in a synchronous buck converter(Opens in a new tab)
Bachelor thesis, Yassine Choukri, March 2019
Characterization and analysis of reverse and forward body biasing as a throughput and power optimization technique for multi-core microcontrollers(Opens in a new tab)
Master thesis, Jan-Morten Reiners, March 2019
Configuration and commissioning of the FTDI 2232H Mini module as an I2C interface(Opens in a new tab)
Bachelor thesis, Nurullah Özkan, March 2019
Extension of a clocktree analysis tool to determine the structural equivalence of clocktrees(Opens in a new tab)
Master thesis, Johannes Düperthal, February 2019
Development of an electronic load for testing power supplies in product development(Opens in a new tab)
Master's thesis, Raphael Achtelik, January 2019
Development of a control of a DA converter connected to an FPGA using a QT application(Opens in a new tab)
Bachelor thesis, Othmane Guellaf, December 2018
Development of a delay-locked loop based time-to-digital converter with sub-gate delay resolution for a time-of-flight application in 350 nm CMOS technology(Opens in a new tab)
Master thesis, Matthias Krause, June 2018
Design of a delay-locked loop for use as a time-to-digital converter in a time-of-flight application in 350nm CMOS technology(Opens in a new tab)
Master thesis, Markus Lippold, June 2018
Development of a low-side comparator for a sawtooth generator for use in a buck converter in 180nm CMOS technology(Opens in a new tab)
Bachelor thesis, Oussama Mokrane, March 2018
Analog and Digital CMOS Circuit Design for the Control System of ATLAS Pixel Detector(Opens in a new tab)
Master thesis, Ahmad Rizwan, March 2018
Design of a Low-Drop Out Regulator in 180nm CMOS Technology for Use in a Synchronous DC-DC Voltage Converter(Opens in a new tab)
Bachelor thesis, Sahin Deniz, March 2018
VHDL design of an RMII interface for connecting physical layer devices to an Ethernet MAC protocol unit
Bachelor thesis, Aaron Beer, March 2018
VHDL design of a frame generator for the implementation of the Ethernet MAC protocol layer
Bachelor thesis, Björn Fiegler, November 2017
Development of a sawtooth generator for a synchronous buck converter in a 180nm CMOS technology
Bachelor thesis, Reda Bouroumiya, November 2017
Feasibility study of a solar power plant with tracking system in Jordan
Bachelor thesis, Cagdas Karamahmut, November 2017
Realization of a measurement setup for the calculation of a complex impedance on a 12 volt lead-acid battery
Bachelor thesis, Murat Lacin, October 2017
Development of an automated charging, discharging and test system for a series circuit of high-performance cells
Master's thesis, Max Espelkott, September 2017
Development of a threshold discriminator for a synchronous buck converter in a 180nm CMOS technology
Bachelor thesis, Taner Saglam, August 2017
Setup of an automated measuring station for the characterization of voltage regulators
Bachelor thesis, Karl Macha, July 2017
Development of an electrolytic conductivity sensor system
Master's thesis, Marcel Gempf, June 2017